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Re: ACARD AEC6260M pciide card on macppc



>更に話が関係ない方に飛びますが、2001/06/18 頃の kernel だと、
>iBook に入替えている 20G のものが全く動かない気がしています。

書きかけですが、これで…どうかな。

*** wdc_obio.c~	Sat Jun 16 02:02:41 2001
--- wdc_obio.c	Fri Jun 29 01:13:26 2001
***************
*** 61,66 ****
--- 61,68 ----
  
  #define WDC_OPTIONS_DMA 0x01
  
+ #define WDC_OBIO_ATA4	0x01
+ 
  /*
   * XXX This code currently doesn't even try to allow 32-bit data port use.
   */
***************
*** 72,77 ****
--- 74,80 ----
  	dbdma_regmap_t *sc_dmareg;
  	dbdma_command_t	*sc_dmacmd;
  	void *sc_ih;
+ 	int sc_flags;
  };
  
  int wdc_obio_probe __P((struct device *, struct cfdata *, void *));
***************
*** 125,133 ****
  	int use_dma = 0;
  	char path[80];
  
  	if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_DMA) {
  		if (ca->ca_nreg >= 16 || ca->ca_nintr == -1)
! 			use_dma = 1;	/* XXX Don't work yet. */
  	}
  
  	if (ca->ca_nintr >= 4 && ca->ca_nreg >= 8) {
--- 128,141 ----
  	int use_dma = 0;
  	char path[80];
  
+ 	if (strcmp(ca->ca_name, "ata-4") == 0) {
+ 		sc->sc_flags |= WDC_OBIO_ATA4;
+ 		printf(" (ata-4)");
+ 	}
+ 
  	if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_DMA) {
  		if (ca->ca_nreg >= 16 || ca->ca_nintr == -1)
! 			use_dma = 1;
  	}
  
  	if (ca->ca_nintr >= 4 && ca->ca_nreg >= 8) {
***************
*** 169,174 ****
--- 177,186 ----
  					 ca->ca_reg[3]);
  		sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
  		sc->sc_wdcdev.DMA_cap = 2;
+ 		if (strcmp(ca->ca_name, "ata-4") == 0) {
+ 			sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
+ 			sc->sc_wdcdev.UDMA_cap = 4;
+ 		}
  #ifdef notyet
  		/* Minimum cycle time is 150ns (DMA MODE 1) on ohare. */
  		if (ohare) {
***************
*** 212,220 ****
  
  	wdcattach(chp);
  
! 	/* modify DMA access timings */
! 	if (use_dma)
! 		adjust_timing(chp);
  
  }
  
--- 224,231 ----
  
  	wdcattach(chp);
  
! 	/* modify access timings */
! 	adjust_timing(chp);
  
  }
  
***************
*** 230,245 ****
  	{ 180,  80 },    /*      3 */
  	{ 120,  70 }     /*      4 */
  };
  static struct ide_timings dma_timing[3] = {
  	{ 480, 215 },	/* Mode 0 */
  	{ 150,  80 },	/* Mode 1 */
  	{ 120,  70 },	/* Mode 2 */
  };
  
! #define TIME_TO_TICK(time) howmany((time), 30)
  
  #define CONFIG_REG (0x200 >> 4)		/* IDE access timing register */
  
  void
  adjust_timing(chp)
  	struct channel_softc *chp;
--- 241,260 ----
  	{ 180,  80 },    /*      3 */
  	{ 120,  70 }     /*      4 */
  };
+ 
  static struct ide_timings dma_timing[3] = {
  	{ 480, 215 },	/* Mode 0 */
  	{ 150,  80 },	/* Mode 1 */
  	{ 120,  70 },	/* Mode 2 */
  };
  
! #define TIME_TO_TICK(time)	howmany(time, 30)
! #define TIME_TO_TICK_ATA4(time)	howmany((time) * 2, 15)
  
  #define CONFIG_REG (0x200 >> 4)		/* IDE access timing register */
  
+ #define NOMODE 999
+ 
  void
  adjust_timing(chp)
  	struct channel_softc *chp;
***************
*** 247,267 ****
  	struct ata_drive_datas *drvp;
  	u_int conf;
  	int drive;
! 	int piomode = -1, dmamode = -1;
  	int min_cycle, min_active;
  	int cycle_tick, act_tick, inact_tick, half_tick;
! 
  
  	for (drive = 0; drive < 2; drive++) {
  		drvp = &chp->ch_drive[drive];
  		if ((drvp->drive_flags & DRIVE) == 0)
  			continue;
! 		if (piomode == -1 || piomode > drvp->PIO_mode)
  			piomode = drvp->PIO_mode;
  		if (drvp->drive_flags & DRIVE_DMA) {
! 			if (dmamode == -1 || dmamode > drvp->DMA_mode)
  				dmamode = drvp->DMA_mode;
  		}
  	}
  	for (drive = 0; drive < 2; drive++) {
  		drvp = &chp->ch_drive[drive];
--- 262,287 ----
  	struct ata_drive_datas *drvp;
  	u_int conf;
  	int drive;
! 	int piomode = NOMODE, dmamode = NOMODE, udmamode = NOMODE;
  	int min_cycle, min_active;
  	int cycle_tick, act_tick, inact_tick, half_tick;
! 	struct wdc_obio_softc *sc = (struct wdc_obio_softc *)chp->wdc;
! 	int ata4 = sc->sc_flags & WDC_OBIO_ATA4;
  
  	for (drive = 0; drive < 2; drive++) {
  		drvp = &chp->ch_drive[drive];
  		if ((drvp->drive_flags & DRIVE) == 0)
  			continue;
! 		if (piomode > drvp->PIO_mode)
  			piomode = drvp->PIO_mode;
  		if (drvp->drive_flags & DRIVE_DMA) {
! 			if (dmamode > drvp->DMA_mode)
  				dmamode = drvp->DMA_mode;
  		}
+ 		if (drvp->drive_flags & DRIVE_UDMA) {
+ 			if (udmamode > drvp->UDMA_mode)
+ 				udmamode = drvp->UDMA_mode;
+ 		}
  	}
  	for (drive = 0; drive < 2; drive++) {
  		drvp = &chp->ch_drive[drive];
***************
*** 269,287 ****
  			drvp->PIO_mode = piomode;
  			if (drvp->drive_flags & DRIVE_DMA)
  				drvp->DMA_mode = dmamode;
  		}
  	}
  	min_cycle = pio_timing[piomode].cycle;
  	min_active = pio_timing[piomode].active;
  
! 	cycle_tick = TIME_TO_TICK(min_cycle);
! 	act_tick = TIME_TO_TICK(min_active);
! 	inact_tick = cycle_tick - act_tick - 1;
! 	if (inact_tick < 1)
! 		inact_tick = 1;
! 	conf = (inact_tick << 5) | act_tick;
! 	if (dmamode != -1) {
! 		/* there are active  DMA mode */
  
  		min_cycle = dma_timing[dmamode].cycle;
  		min_active = dma_timing[dmamode].active;
--- 289,352 ----
  			drvp->PIO_mode = piomode;
  			if (drvp->drive_flags & DRIVE_DMA)
  				drvp->DMA_mode = dmamode;
+ 			if (drvp->drive_flags & DRIVE_UDMA)
+ 				drvp->UDMA_mode = udmamode;
  		}
  	}
+ 
  	min_cycle = pio_timing[piomode].cycle;
  	min_active = pio_timing[piomode].active;
  
! 	/* PIO */
! 	if (ata4) {
! 		cycle_tick = TIME_TO_TICK_ATA4(min_cycle);
! 		act_tick = TIME_TO_TICK_ATA4(min_active);
! 
! 		inact_tick = cycle_tick - act_tick;
! 
! 		/* conf &= ~0x3ff; 5-5 */
! 		conf = inact_tick << 5 | act_tick;
! 	} else {
! 		cycle_tick = TIME_TO_TICK(min_cycle);
! 		act_tick = TIME_TO_TICK(min_active);
! 
! 		inact_tick = cycle_tick - act_tick - 1;
! 		if (inact_tick < 1)
! 			inact_tick = 1;
! 
! 		/* conf &= ~7ff; 6-5 */
! 		conf = inact_tick << 5 | act_tick;
! 	}
! 
! 	/* MDMA */
! 	if (ata4 && dmamode != NOMODE) {
! 		min_cycle = dma_timing[dmamode].cycle;
! 		min_active = dma_timing[dmamode].active;
! 
! 		cycle_tick = TIME_TO_TICK_ATA4(min_cycle);
! 		act_tick = TIME_TO_TICK_ATA4(min_active);
! 		inact_tick = cycle_tick - act_tick;
! 
! 		/* XXX */
! 		inact_tick = min(inact_tick, 31);
! 
! 		/* conf &= ~0x001ffc00; 1-5-5? */
! 		conf |= inact_tick << 15 | act_tick << 10;
! 	}
! 
! 	/* UDMA */
! 	if (ata4 && udmamode != NOMODE) {
! 
! 		/* XXX */
! 		act_tick = 0;
! 		cycle_tick = 0;
! 
! 		/* conf &= ~0x1ff00000; 4-4-1 */
! 		conf |= act_tick << 25 | cycle_tick << 21 | 1 << 20;
! 	}
! 
! 	if (ata4 == 0 && dmamode != NOMODE) {
! 		/* there are active MDMA mode */
  
  		min_cycle = dma_timing[dmamode].cycle;
  		min_active = dma_timing[dmamode].active;
***************
*** 292,299 ****
  		if (inact_tick < 1)
  			inact_tick = 1;
  		half_tick = 0;	/* XXX */
! 		conf |=
! 		    (half_tick << 21) | (inact_tick << 16) | (act_tick << 11);
  	}
  	bus_space_write_4(chp->cmd_iot, chp->cmd_ioh, CONFIG_REG, conf);
  #if 0
--- 357,364 ----
  		if (inact_tick < 1)
  			inact_tick = 1;
  		half_tick = 0;	/* XXX */
! 		conf |= half_tick << 21 | inact_tick << 16 | act_tick << 11;
! 		/* 1-5-5 */
  	}
  	bus_space_write_4(chp->cmd_iot, chp->cmd_ioh, CONFIG_REG, conf);
  #if 0